1. Field of the Invention
This invention relates to a method of fabricating lateral, complementary heterojunction bipolar transistors (HBT) and the transistor.
2. Brief Description of the Prior Art
Prior art attempts to fabricate lateral, planar HBTs have met with only limited success. To date, there has been no known satisfactory demonstration of monolithic complementary lateral HBTs. Lateral bipolar transistor structures are commonplace in silicon technology, but not well developed in other materials systems, such as the group III-V devices and the Si/SiGe devices. An article of K. Taira et al. entitled "New Lateral GaAs Transistor", Proceedings of IEDM, page 201 (1984) relates to fabrication of lateral GaAs transistors, however the transistor is not a heterojunction device and the base width is relatively large (1.3 .mu.m). Additionally, the current gain for this npn bipolar device is only 1. However, this approach allows for the easy fabrication of monolithic complementary circuits because the device active regions are formed by ion implantation.
In an article of P. Canfield et al. entitled "Lateral n-p-n Bipolar Transistors by Ion Implantation into Semi-insulating GaAs", Solid-State Electronics, Vol. 31, page 123 (1988), an improvement is provided wherein a lateral npn GaAs bipolar device is fabricated with a current gain of 50. This also is not a heterojunction device and has a base width of 1 .mu.m which is unacceptably large for a high-speed device.
Articles of Yoo et al. entitled "InP/InGaAsP Heterojunction Bipolar Transistor by Selective Area Epitaxial Growth", Electronics Letters, Vol. 25, page 191 (1989) and "Fabrication and Characterization of Lateral InP/InGaAsP Heterojunction and Bipolar Transistors", Applied Physics Letters, Vol. 54, page 2318 (1989) show significant progress with the fabrication of an InP/InGaAsP lateral heterojunction bipolar transistor by selective area epitaxy to grow the emitter and collector structures. However, this process is cumbersome and, to date, has only resulted in transistors with current gains of 6 and base widths of 2 .mu.m. Additionally, diffusion of the p-type donors from the base to the emitter and collector region occurs, resulting in a misalignment of the heterojunction and the electrical junction. Moreover, this process is poorly suited to the fabrication of monolithic complementary circuits, as this process would require a second regrowth.
A Thornton et al., article entitled "Unified Planar Process for Fabricating Heterojunction Bipolar Transistors and Buried-Heterojunction Lasers Utilizing Impurity-Induced Disordering", Applied Physics Letters, Vol. 53, page 2669 (1988), shows a process for fabrication of lateral GaAs/AlGaAs heterojunction bipolar transistors with current gains of 400 but low breakdown voltages (3 volts) and very high turn on voltages (about 10 volts) due to very high resistances in the collector and emitter. These device characteristics are unacceptable in integrated circuits. The fabrication process, which uses impurity induced disordering, is much better suited to the fabrication of monolithic laser/bipolar transistor circuits (its intended use) than it is to the fabrication of complementary circuits due to the large parasitic resistances involved and the necessity of regrowth to form both npn and pnp devices.